A Practical On-Board SiC MOSFET Condition Monitoring Technique for Aging Detection

• Published in: IEEE transactions on industry applications Vol. 56; no. 3; pp. 2828 - 2839
• Main Authors: Pu, Shi, Yang, Fei, Vankayalapati, Bhanu Teja, Ugur, Enes, Xu, Chi, Akin, Bilal
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.05.2020; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Accelerated aging; Accelerated aging tests; Accelerated tests; Aging; Bias; Condition monitoring; Converters; Degradation; Early warning systems; Fatigue tests; fault detection; Logic gates; Monitoring; MOSFET; MOSFETs; Pulse duration; Saturation; Sensors; Silicon carbide; silicon carbide (SiC) <inline-formula xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <tex-math notation="LaTeX"> scriptstyle{\text{MOSFET}}</tex-math> </inline-formula>s; System effectiveness
• ISSN: 0093-9994; 1939-9367
• DOI: 10.1109/TIA.2020.2980220

In this article, an in situ SiC mosfet degradation monitoring method using readily available converter sensors is presented. Device's drain-source resistance in saturation and ohmic regions are employed as aging precursors to, respectively, indicate die and package-related degradations. The presented findings in this article are essential for low-cost and practical early warning systems in power electronics applications. To verify the effectiveness of the proposed method, a number of power-cycling tests are conducted to analyze aging process and fatigue mechanism. Device static parameters are measured throughout accelerated aging tests and the physical causes behind them are discussed in detail. It is shown that the drain-source resistance within saturation region at low gate bias can be used to indicate die-related degradation. Similarly, at full positive gate bias, device on -state drain-source resistance can be used to detect package-related degradation. In order to find out optimal variables such as applied gate bias, pulse duration, etc., a comprehensive single pulse test is conducted and the results are reported. Finally, the proposed degradation monitoring method is experimentally validated in the context of a three-phase inverter considering different sensor configurations and load types.