A high-endurance low-temperature polysilicon thin-film transistor EEPROM cell
A planar type polysilicon thin-film transistor (poly-Si TFT) EEPROM cell with electron cyclotron resonance (ECR) N/sub 2/O-plasma oxide has been developed with a low temperature (/spl les/400/spl deg/C) process. The poly-Si TFT EEPROM cell has an initial threshold voltage shift of 4 V for programmin...
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Published in | IEEE electron device letters Vol. 21; no. 6; pp. 304 - 306 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.06.2000
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | A planar type polysilicon thin-film transistor (poly-Si TFT) EEPROM cell with electron cyclotron resonance (ECR) N/sub 2/O-plasma oxide has been developed with a low temperature (/spl les/400/spl deg/C) process. The poly-Si TFT EEPROM cell has an initial threshold voltage shift of 4 V for programming and erasing voltages of 11 V and -11 V, respectively. Furthermore, the poly-Si TFT EEPROM cell maintains the threshold voltage shift of 4 V after 100 000 program/erase cycles. The excellent high endurance of the fabricated poly-Si TFT EEPROM cell is attributed to the ECR N/sub 2/O-plasma oxide with good charge-to-breakdown (Qbd) characteristics. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/55.843158 |