ATLAS IBL: integration of new HW/SW readout features for the additional layer of Pixel Detector
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design. The front-end electronics features a new readout ASIC, named FE-14, which requires new off-detector electronics, currently realized with two VME-based boards: the Back Of Crate module (...
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Published in | Journal of instrumentation Vol. 6; no. 1; p. C01018 |
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Main Authors | , , , , , , , , , , , , , , , , , |
Format | Journal Article |
Language | English |
Published |
IOP Publishing
01.01.2011
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Subjects | |
Online Access | Get full text |
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Summary: | An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design. The front-end electronics features a new readout ASIC, named FE-14, which requires new off-detector electronics, currently realized with two VME-based boards: the Back Of Crate module (BOC) implements optical I/O functionality and the ReadOut Driver module (ROD) implements data processing functionality, plus a Timing Interface Module (TIM). This paper presents a proposal for the IBL readout system, mainly focusing on the ROD board. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 1748-0221 1748-0221 |
DOI: | 10.1088/1748-0221/6/01/C01018 |