A method for negative bias temperature instability (NBTI) measurements on power VDMOS transistors

A method suitable for performing NBTI measurements on power p-channel VDMOS transistors is described. A practical implementation using simple boosting circuit for obtaining required gate stress voltage and sweep I-V measurements for the threshold voltage shift determination is presented. Experimenta...

Full description

Saved in:
Bibliographic Details
Published inMeasurement science & technology Vol. 23; no. 8; pp. 85003 - 1-8
Main Authors Priji, A, Dankovi, D, Vra ar, Lj, Mani, I, Priji, Z, Stojadinovi, N
Format Journal Article
LanguageEnglish
Published IOP Publishing 01.08.2012
Subjects
Circuits
Devices
Electric potential
Instability
negative bias temperature instability measurements
Niobium base alloys
Semiconductor devices
threshold voltage shift
Transistors
VDMOS transistor
Voltage
Online AccessGet full text

Cover

More Information
Summary:A method suitable for performing NBTI measurements on power p-channel VDMOS transistors is described. A practical implementation using simple boosting circuit for obtaining required gate stress voltage and sweep I-V measurements for the threshold voltage shift determination is presented. Experimental results are discussed in terms of the time necessary to perform interim measurements during NBTI tests. It is shown that the measurements could be done fast enough to capture part of the dynamic recovery effect in these devices, which is important for the lifetime prediction.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0957-0233
1361-6501
DOI:10.1088/0957-0233/23/8/085003