Simulation Study of the Single-Event Effects Sensitivity in Nanoscale CMOS for Body-Biasing Circuits

The sensitivity of single-event effects (SEEs) in nanoscale CMOS for body-biasing circuits has been investigated. For PMOS hits, it is found that forward-biasing the body for high-speed applications can suppress the SET pulses greatly. Reverse-biasing the body for low-power applications, however, do...

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Bibliographic Details
Published inIEEE transactions on device and materials reliability Vol. 14; no. 2; pp. 639 - 644
Main Authors Qin, Junrui, Chen, Shuming, Guo, Changguo, Du, Yankang
Format Magazine Article
LanguageEnglish
Published New York IEEE 01.06.2014
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Circuits
CMOS
Computational modeling
Electric potential
High speed
Integrated circuit modeling
Metal oxide semiconductors
MOSFET
MOSFET circuits
Nanostructure
Semiconductor device modeling
Semiconductor process modeling
Simulation
Solid modeling
Voltage
Body-biasing
single-event effects (SEEs)
pulse quenching
charge sharing effect
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Summary:The sensitivity of single-event effects (SEEs) in nanoscale CMOS for body-biasing circuits has been investigated. For PMOS hits, it is found that forward-biasing the body for high-speed applications can suppress the SET pulses greatly. Reverse-biasing the body for low-power applications, however, does not reduce the SEE vulnerability compared with operation when the body grounded. The body-biasing voltage has no impact on SEE sensitivity for NMOS hits.
Bibliography:ObjectType-Article-1
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ISSN:1530-4388
1558-2574
DOI:10.1109/TDMR.2014.2308592