A Fast Analog Circuit Analysis Algorithm for Design Modification and Verification
This paper presents a fast analog circuit analysis algorithm, fundamental circuit-based circuit analysis, for circuits being repeatedly modified and verified in product development. The algorithm reuses previous circuit simulation result on successive changed circuit analysis to achieve simulation o...
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Published in | IEEE transactions on computer-aided design of integrated circuits and systems Vol. 30; no. 2; pp. 308 - 313 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.02.2011
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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