A Fast Analog Circuit Analysis Algorithm for Design Modification and Verification

This paper presents a fast analog circuit analysis algorithm, fundamental circuit-based circuit analysis, for circuits being repeatedly modified and verified in product development. The algorithm reuses previous circuit simulation result on successive changed circuit analysis to achieve simulation o...

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Bibliographic Details
Published inIEEE transactions on computer-aided design of integrated circuits and systems Vol. 30; no. 2; pp. 308 - 313
Main Authors Zhou, T Y, Hang Liu, Dian Zhou, Tarim, Tuna
Format Journal Article
LanguageEnglish
Published New York IEEE 01.02.2011
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Algorithm design and analysis
Algorithms
Analog circuit simulation
Analog circuits
behavior modeling
Biological system modeling
CAD
circuit optimization design and verification
Circuit simulation
Circuits
Computational modeling
Computer aided design
Computer simulation
Deltas
Design engineering
Integrated circuit modeling
Mathematical models
Solid modeling
SPICE
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Summary:This paper presents a fast analog circuit analysis algorithm, fundamental circuit-based circuit analysis, for circuits being repeatedly modified and verified in product development. The algorithm reuses previous circuit simulation result on successive changed circuit analysis to achieve simulation operation reduction. The algorithm is implemented with SPICE simulator on linear and nonlinear circuit applications with the proposed device delta models. The experiments show that the algorithm increases the speed of the circuit simulation five to ten times over directly simulations under the same simulation accuracy.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2010.2081750