Evolutionary Computation on Programmable Robust IIR Filter Pole-Placement Design

• Published in: IEEE transactions on instrumentation and measurement Vol. 60; no. 4; pp. 1469 - 1479
• Main Author: Pan, Shing-Tai
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.04.2011; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Algorithm design and analysis; Criteria; Design; Disk filters; Evolutionary computation; Field programmable gate arrays; field-programmable gate array (FPGA) chip; Gallium; Genetic algorithms; IIR filters; Noise measurement; Optimization; pole-placement design; Poles; Polynomials; robustly stable infinite-impulse-response (IIR) filter; Robustness; Speech; Strategy; Studies
• ISSN: 0018-9456; 1557-9662
• DOI: 10.1109/TIM.2010.2086850

This paper explores the pole-placement design problem of a robust stable infinite-impulse-response (IIR) filter to attenuate or eliminate the undesired measurement noise and proposes a strategy based on an adaptive differential evolution (ADE) algorithm to design a filter. The results are compared to the results of other popular evolutionary algorithms, e.g., particle swarm optimization (PSO), genetic algorithm (GA), and improved genetic algorithm (IGA). The stability robustness for an IIR filter will be achieved by placing all poles inside a disk D (α, r ) contained in the unit disk, in which α is the center, and r is the radius of the disk. This investigation first uses a robust stability criterion, called the D (α, r )-stability criterion, to ensure that digital filter poles lie inside a disk D (α, r ). The proposed strategy checks the criterion during differential evolution (DE) and adaptively adjusts the DE parameters, depending on the current DE performance. This paper also introduces two design examples of a bandpass IIR filter and a low-pass IIR filter for the measurement of a speech signal. These examples show that the proposed strategy performance based on the proposed ADE is better than designs based on PSO, GA, and IGA. Finally, this paper implements an IIR filter on the field-programmable gate array (FPGA) chip to verify the designed filter performance in practical electronic devices and uses speech signals as an input signal to the FPGA chip to verify that the measurement noise of the speech signal is attenuated by the designed IIR filter.