EMIB and advanced substrate packaging technologies to enable heterogeneous integration (HI) applications
Abstract Heterogeneous chiplet integration has become a crucial performance enabler in the microelectronics industry by providing the flexibility of die disaggregation, and the ability to mix/match different IP blocks optimized on different Si nodes in a single package. It shows great potential in s...
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Published in | Japanese Journal of Applied Physics Vol. 63; no. 2; pp. 20803 - 20806 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
Tokyo
IOP Publishing
29.02.2024
Japanese Journal of Applied Physics |
Subjects | |
Online Access | Get full text |
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Summary: | Abstract
Heterogeneous chiplet integration has become a crucial performance enabler in the microelectronics industry by providing the flexibility of die disaggregation, and the ability to mix/match different IP blocks optimized on different Si nodes in a single package. It shows great potential in supercomputing, autonomous driving, artificial intelligence, and machine learning applications. With rising demand in high performance computing, the key focus in heterogeneous integration (HI) scaling has been to push interconnect density with increased bandwidth and improved power efficiency. In this paper, we provide an overview of embedded multi-interconnect bridge packaging technology scaling and discuss key considerations for advanced substrate packaging technologies to enable further HI applications. |
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Bibliography: | JJAP-S1103668.R3 |
ISSN: | 0021-4922 1347-4065 |
DOI: | 10.35848/1347-4065/ad125a |