A Thermopile Infrared Sensor Array Pixel Monolithically Integrated with an NMOS Switch

In this article, we present the design, fabrication, and characterization of a thermopile infrared sensor array (TISA) pixel. This TISA pixel is composed of a dual-layer p+/n- poly-Si thermopile with a closed membrane and an n-channel metal oxide semiconductor (NMOS) switch. To address the challenge...

Full description

Saved in:
Bibliographic Details
Published inMicromachines (Basel) Vol. 13; no. 2; p. 258
Main Authors Li, Hongbo, Zhang, Chenchen, Xu, Gaobo, Ding, Xuefeng, Ni, Yue, Chen, Guidong, Chen, Dapeng, Zhou, Na, Mao, Haiyang
Format Journal Article
LanguageEnglish
Published Switzerland MDPI AG 04.02.2022
MDPI
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:In this article, we present the design, fabrication, and characterization of a thermopile infrared sensor array (TISA) pixel. This TISA pixel is composed of a dual-layer p+/n- poly-Si thermopile with a closed membrane and an n-channel metal oxide semiconductor (NMOS) switch. To address the challenges in fabrication through the 3D integration method, the anode of the thermopile is connected to the drain of the NMOS, both of which are fabricated on the same bulk wafer using a CMOS compatible monolithic integration process. During a single process sequence, deposition, etching, lithography, and ion implantation steps are appropriately combined to fabricate the thermopile and the NMOS simultaneously. At the same time as ensuring high thermoelectric characteristics of the dual-layer p+/n- poly-Si thermopile, the basic switching functions of NMOS are achieved. Compared with a separate thermopile, the experimental results show that the thermopile integrated with the NMOS maintains a quick response, high sensitivity and high reliability. In addition, the NMOS employed as a switch can effectively and quickly control the readout of the thermopile sensing signal through the voltage, both on and off, at the gate of NMOS. Thus, such a TISA pixel fabricated by the monolithic CMOS-compatible integration approach is low-cost and high-performance, and can be applied in arrays for high-volume production.
Bibliography:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 23
ISSN:2072-666X
2072-666X
DOI:10.3390/mi13020258