A Flexible Selective Harmonic Mitigation Technique to Meet Grid Codes in Three-Level PWM Converters

• Published in: IEEE transactions on industrial electronics (1982) Vol. 54; no. 6; pp. 3022 - 3029
• Main Authors: Franquelo, L.G., Napoles, J., Guisado, R.C.P., Leon, J.I., Aguirre, M.A.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.12.2007; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Codes; Converters; Flexibility; Harmonic control; Harmonic distortion; Harmonics; Heuristic; Heuristic algorithms; Joints; Mesh generation; multilevel converters; optimization methods; Power filters; Power harmonic filters; Power system harmonics; Pulse duration modulation; Pulse generation; Pulse width modulation; Pulse width modulation converters; pulsewidth-modulated power converters; Space vector pulse width modulation; Studies; Switching; Total harmonic distortion
• ISSN: 0278-0046; 1557-9948
• DOI: 10.1109/TIE.2007.907045

Due to the development of new grid codes, power converters' output signal harmonic control is currently becoming extremely important in medium- and high-power applications. By taking this new scenario into account, a new method to generate switching three-level pulsewidth-modulation (PWM) patterns to meet specific grid codes is presented. The proposed method, which is named selective harmonic mitigation PWM , generates switching three-level PWM patterns with high quality from the point of view of harmonic content, avoiding the elimination of some specific harmonics and studying all harmonics and the total harmonic distortion as a global problem by using a general-purpose random-search heuristic algorithm. This fact leads to a drastic reduction or even avoidance of the bulky and costly grid connection tuned filters of power systems. Any harmonic shaping can be considered due to the flexibility of the method. Power devices switching constraints are considered to obtain directly applicable results. As a practical example, limits from one actual grid code have been used to get the experimental results by means of a 150-kVA three-level diode-clamped converter test bench. Comparisons between the proposed technique, optimized PWM and Selective Harmonic Elimination methods have been carried out. The results obtained with this new method greatly improve previous ones.