Efficient DC fault simulation of nonlinear analog circuits: one-step relaxation and adaptive simulation continuation

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 25; no. 7; pp. 1392 - 1400
• Main Authors: Shi, C.-J.R., Tian, M.W., Guoyong Shi
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.07.2006; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Analog circuits; Analog testing; Approximation; Circuit faults; Circuit simulation; Circuit testing; Circuits; Computational modeling; Computer simulation; dc fault simulation; Direct current; Electrical fault detection; Failure analysis; fault coverage; Fault detection; fault ordering; Faults; first-order approximation; Iterative methods; Mathematical models; Newton-Raphson iteration; Nonlinearity; Predictive models; simulation continuation; System testing

Efficient dc fault simulation of nonlinear analog circuits is addressed in this paper. Two techniques, one-step relaxation and adaptive simulation continuation, are proposed. By one-step relaxation, only one Newton-Raphson iteration is performed for each faulty circuit with the dc solution of the go...