A Low-Parasitic and Common-Centroid Cross-Coupled CMOS Transistor Structure for High-Frequency VCO Design
This letter reports a cross-coupled transistor structure that allows simple routing, induces no gate-drain overlap interconnect capacitances, minimizes the parasitic resistances of interconnects, allows smaller drain-junction parasitic capacitances, and provides inherent common-centroid characterist...
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Published in | IEEE electron device letters Vol. 30; no. 5; pp. 532 - 534 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
IEEE
01.05.2009
Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | This letter reports a cross-coupled transistor structure that allows simple routing, induces no gate-drain overlap interconnect capacitances, minimizes the parasitic resistances of interconnects, allows smaller drain-junction parasitic capacitances, and provides inherent common-centroid characteristic, all of which help to improve the high-frequency and wideband performances of CMOS voltage-controlled oscillators (VCOs). The proposed cross-coupled transistor structure is applied for a 26.2-GHz differential VCO design which dissipates 7.3 mA from 1.8-V supply using 0.18-mum CMOS. Measurements show 2.1-GHz, 29%, and 4-dB improvements in operating frequency, tuning range, and phase noise compared to those of the VCO using a conventional cross-coupled transistor layout, respectively. The VCO with the proposed transistor structure shows the phase noise of -113.7 dBc/Hz at 1 MHz, which corresponds to FOM and FOMT of -190.4 and -194 dBc/Hz, respectively. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2009.2015472 |