A 1.5-V multi-mode quad-band RF receiver for GSM/EDGE/CDMA2K in 90-nm digital CMOS process

• Published in: IEEE journal of solid-state circuits Vol. 41; no. 5; pp. 1149 - 1159
• Main Authors: Bakkaloglu, B., Fontaine, P., Mohieldin, A.N., Solti Peng, Sher Jiun Fang, Dulger, F.
• Format: Journal Article Conference Proceeding
• Language: English
• Published: New York, NY IEEE 01.05.2006; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Amplifiers; Applied sciences; Baseband; Broadband amplifiers; Circuit properties; CMOS; CMOS integrated circuits; CMOS process; Consumption; Design. Technologies. Operation analysis. Testing; Digital; Digital filters; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Filtering; Gain; GSM; Hardware; Inductors; Input-output equipment; Integrated circuits; low-noise amplifier; Mixers; multimode; Noise; Noise figure; Noise levels; Radio frequencies; Radio frequency; radio frequency integrated circuits; Receivers; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Signal convertors; transceivers; wireless; Noise figure; multimode; radio frequency integrated circuits; Low noise amplifier; Mixer; Power supply; Self bias; Analog filtering; Inductor; AD converter; User interface; Complementary MOS technology; transceivers; Frequency converter; Resistive load; CMOS integrated circuits; low-noise amplifier; Direct convertor; Multichip module; Base band; Digitizing; Radiofrequency; Integrated circuit; Frequency divider; Radio receivers; wireless; Gain; Automatic gain control
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2006.872740

A single chip quad-band multi-mode (GSM900/ DCS1800/PCS1900/CDMA2K) direct-conversion RF receiver with integrated baseband ADCs is presented. The fully integrated RF receiver is implemented in a 90-nm single poly, six level metal, standard digital CMOS process with no additional analog and RF components. The highly digital multi-mode receiver uses minimum analog filtering and AGC stages, digitizing useful signal, dynamic DC offsets and blockers at the mixer output. The direct-conversion GSM front-end utilizes resistive loaded LNAs with only two coupled inductors per LNA. The GSM front-end achieves a 31.5 dB gain and a 2.1 dB integrated noise figure with a 5 dB noise figure under blocking conditions. The CDMA2K front-end utilizes a self-biased common-gate input amplifier followed by passive mixers, achieving wideband input matching from 900 MHz up to 2.1 GHz with an IIP3 of +8 dBm. The GSM receiver consumes 38 mA from a power supply of 1.5 V and CDMA2K receiver consumes 16 mA in the low band and 21 mA in the high band. The multi-mode receiver, including LO buffers and frequency dividers, ADCs, and reference buffers, occupies 2.5 mm/sup 2/.