Dynamic Bias Instability of p-Channel Polycrystalline-Silicon Thin-Film Transistors Induced by Impact Ionization

• Published in: IEEE electron device letters Vol. 30; no. 4; pp. 368 - 370
• Main Authors: HUANG, Ching-Fang, SUN, Hung-Chang, YANG, Ying-Jhe, CHEN, Yen-Ting, KU, Chun-Yuan, CHEE WEE LIU, HSU, Yuan-Jun, SHIH, Ching-Chieh, CHEN, Jim-Shone
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.04.2009; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Channels; Circuits; Degradation; Devices; Dielectric substrates; Drains; Dynamic bias instability; Dynamics; Electron traps; Electronics; Exact sciences and technology; Glass; Impact ionization; Ionization; Photonics; Semiconductor devices; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon dioxide; Stress; Sun; Thin film transistors; Thin films; thin-film transistor (TFT); Transistors; Dynamic bias instability; thin-film transistor (TFT); Polycrystal; Short channel; Switching; Secondary electron; Charge carrier trapping; p channel; Electric field; p type semiconductor; High field; Drain current; Field ionization; Trapped electron; Impact ionization; Thin film transistor
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2009.2013644

The dynamic stress switching of p-channel polycrystalline-silicon (poly-Si) thin-film transistors from full depletion to accumulation bias creates the high electric field near source/drain (S/D) junctions due to the slow formation of the accumulated electrons at the SiO 2 /poly -Si interface. The high electric field causes impact ionization near the S/D, where the secondary electrons surmount the SiO 2 barrier and are trapped near the interface. The channel region near the S/D is inverted to p-type by the trapped electrons, and the effective channel length is reduced. The drain current increases with the stress time, particularly for short-channel devices.