CMOS Ultrasound Transceiver Chip for High-Resolution Ultrasonic Imaging Systems

• Published in: IEEE transactions on biomedical circuits and systems Vol. 3; no. 5; pp. 293 - 303
• Main Authors: Insoo Kim, Hyunsoo Kim, Griggio, F., Tutwiler, R.L., Jackson, T.N., Trolier-McKinstry, S., Kyusun Choi
• Format: Journal Article
• Language: English
• Published: United States IEEE 01.10.2009; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Array signal processing; Digital beamforming; high-frequency PZT transducer; Image resolution; Micromechanical devices; Power supplies; Power supply; Prototypes; Pulse measurements; Random access memory; Transceivers; Ultrasonic imaging; Ultrasonic transducers; ultrasound transceiver
• ISSN: 1932-4545; 1940-9990
• DOI: 10.1109/TBCAS.2009.2023912

The proposed CMOS ultrasound transceiver chip will enable the development of portable high resolution, high-frequency ultrasonic imaging systems. The transceiver chip is designed for close-coupled MEMS transducer arrays which operate with a 3.3-V power supply. In addition, a transmit digital beamforming system architecture is supported in this work. A prototype chip containing 16 receive and transmit channels with preamplifiers, time-gain compensation amplifiers, a multiplexed analog-to-digital converter with 3 kB of on-chip SRAM, and 50-MHz resolution time delayed excitation pulse generators has been fabricated. By utilizing a shared A/D converter architecture, the number of A/D converter and SRAM is cut down to one, unlike typical digital beamforming systems which need 16 A/D converters for 16 receive channels. The chip was fabricated in a 0.35-mum standard CMOS process. The chip size is 10 mm 2 , and its average power consumption in receive mode is approximately 270 mW with a 3.3-V power supply. The transceiver chip specifications and designs are described, as well as measured results of each transceiver component and initial pulse-echo experimental results are presented.