A fully integrated low-IF CMOS GPS radio with on-chip analog image rejection

• Published in: IEEE journal of solid-state circuits Vol. 37; no. 12; pp. 1721 - 1727
• Main Authors: Behbahani, F., Firouzkouhi, H., Chokkalingam, R., Delshadpour, S., Kheirkhahi, A., Nariman, M., Conta, M., Bhatia, S.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.12.2002; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: CMOS; CMOS process; Degradation; Energy consumption; Filters; Geographic information systems; Global Positioning System; Noise figure; Noise levels; Noise measurement; Phase locked loops; Radio; Rejection; Satellite navigation systems; Synthesizers; Voltage
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2002.804355

A fully integrated Global Positioning System (GPS) radio is presented. Low-IF architecture was used for a high level of integration and low power consumption. An on-chip analog image-reject filter provides 18 dB of image-noise rejection to prevent noise figure (NF) degradation. With image rejection performed in the analog radio, a single-path (nonquadrature) output was used. The integrated synthesizer only requires an off-chip phase-locked loop-filter to function. Implemented in a 0.35-/spl mu/m 2P4M CMOS process, the integrated radio has a chip area of 9.5 mm/sup 2/. The radio operates over a wide range of voltage and temperature, from 2.2 to 3.6 V and from -40/spl deg/C to +85/spl deg/C and consumes 27 mW from a 2.2-V supply. The receiver has 4 dB NF.