High-Q factor three-dimensional inductors

• Published in: IEEE transactions on microwave theory and techniques Vol. 50; no. 8; pp. 1942 - 1949
• Main Authors: Piernas, B., Nishikawa, K., Kamogawa, K., Nakagawa, T., Araki, K.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.08.2002; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Conductors; Frequency; Gallium arsenide; Inductors; Integrated circuit technology; MMICs; Q factor; Signal processing; Silicon; Transceivers
• ISSN: 0018-9480; 1557-9670
• DOI: 10.1109/TMTT.2002.801342

In this paper, the great flexibility of three-dimensional (3-D) monolithic-microwave integrated-circuit technology is used to improve the performance of on-chip inductors. A novel topology for high-Q factor spiral inductor that can be implemented in a single or multilevel configuration is proposed. Several inductors were fabricated on either silicon substrate (/spl rho/ = 30 /spl Omega/ /spl middot/ cm) or semi-insulating gallium-arsenide substrate demonstrating, more particularly, for GaAs technology, the interest of the multilevel configuration. A 1.38-nH double-level 3-D inductor formed on an Si substrate exhibits a very high peak Q factor of 52.8 at 13.6 GHz and a self-resonant frequency as high as 24.7 GHz. Our 4.9-nH double-level GaAs 3-D inductor achieves a peak Q factor of 35.9 at 4.7 GHz and a self-resonant frequency of 8 GHz. For each technology, the performance limits of the proposed inductors in terms of quality factor are discussed. Guidelines for the optimum design of 3-D inductors are provided for Si and GaAs technologies.