An ultralow-loss and broadband micromachined RF inductor for RFIC input-matching applications

• Published in: IEEE transactions on electron devices Vol. 53; no. 3; pp. 568 - 570
• Main Authors: TAO WANG, LIN, Yo-Sheng, LU, Shey-Shi
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.03.2006; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Broadband; CMOS; Compatibility; Design. Technologies. Operation analysis. Testing; Drying; Electronics; Etching; Exact sciences and technology; Impedance matching; Inductively coupled plasma; inductively coupled-plasma (ICP); inductor; Inductors; Integrated circuits; Magnetic devices; Microelectronic fabrication (materials and surfaces technology); Micromachining; Microwave integrated circuits; noise figure (NF); Noise levels; Q factor; quality-; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Sputter etching; ultralow-loss; inductively coupled-plasma (ICP); Noise figure; State of the art; Trench technology; Q factor; Dry etching; Broadband; Power gain; Micromachining; System on a chip; Inductor; Ultra wide band; ultralow-loss; Back surface; Microelectronic fabrication; Inductively coupled plasma; Wide band; Complementary MOS technology; Resonance frequency; noise figure (NF); Integrated circuit; quality-(Q) factor; Radiofrequency integrated circuits
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2005.863768

In this brief, we demonstrate that ultralow-loss and broadband inductors can be obtained by using the CMOS process compatible backside inductively coupled-plasma (ICP) deep-trench technology to selectively remove the silicon underneath the inductors. The results show that a 378.5% increase in maximum Q-factor (Q/sub max/) (from 10.7 at 4.7 GHz to 51.2 at 14.9 GHz), a 22.1% increase in self-resonant frequency (f/sub SR/) (from 16.5 to 20.15 GHz), a 16.3% increase (from 0.86 to 0.9999) in maximum available power gain (G/sub Amax/) at 5 GHz, and a 0.654-dB reduction (from 0.654 dB to 4.08/spl times/10/sup -4/ dB) in minimum noise figure (NF/sub min/) at 5 GHz were achieved for a 2-nH inductor after the backside ICP dry etching. In addition, state-of-the-art ultralow-loss G/sub Amax//spl les/0.99 (i.e., NF/sub min//spl les/0.045 dB) for frequencies lower than 12.5 GHz was achieved for this 2-nH inductor after the backside inductively coupled-plasma dry etching. This means this on-chip inductor-on-air can be used to realize an ultralow-noise 3.1-10.6 GHz ultrawide-band RFIC. These results show that the CMOS process compatible backside ICP etching technique is very promising for system-on-a-chip applications.