A novel nanoscaled device concept: quasi-SOI MOSFET to eliminate the potential weaknesses of UTB SOI MOSFET

• Published in: IEEE transactions on electron devices Vol. 52; no. 4; pp. 561 - 568
• Main Authors: Tian, Y., Huang, R., Zhang, X., Wang, Y.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.04.2005; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; CMOS; CMOS integrated circuits; Design. Technologies. Operation analysis. Testing; Devices; Drains; Electronics; Exact sciences and technology; Guidelines; Integrated circuits; MOSFET; MOSFETs; Nanocomposites; Nanomaterials; Nanostructure; parasitic capacitance; quasi-silicon-on-insulator (SOI); Semiconductor device fabrication; Semiconductor device modeling; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; short-channel effect (SCE); Silicon on insulator technology; Studies; Thin film devices; Transistors; ultrathin body (UTB); Ultrathin films; Performance evaluation; MOSFET; Buried layer; Dielectric materials; Thermal behavior; Short channel; short-channel effect (SCE); Silicon on insulator technology; quasi-silicon-on-insulator (SOI); Complementary MOS technology; ultrathin body (UTB); Self heating; Capacitance; parasitic capacitance
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2005.844737

For the first time, a novel device concept of a quasi-silicon-on-insulator (SOI) MOSFET is proposed to eliminate the potential weaknesses of ultrathin body (UTB) SOI MOSFET for CMOS scaling toward the 35-nm gate length, and beyond. A scheme for fabrication of a quasi-SOI MOSFET is presented. The key characteristics of quasi-SOI are investigated by an extensive simulation study comparing them with UTB SOI MOSFET. The short-channel effects can be effectively suppressed by the insulator surrounding the source/drain regions, and the suppression capability can be even better than the UTB SOI MOSFET, due to the reduction of the electric flux in the buried layer. The self-heating effect, speed performance, and electronic characteristics of quasi-SOI MOSFET with the physical channel length of 35 nm are comprehensively studied. When compared to the UTB SOI MOSFET, the proposed device structure has better scaling capability. Finally, the design guideline and the optimal regions of quasi-SOI MOSFET are discussed.