Silicon-on-nothing MOSFETs: performance, short-channel effects, and backgate coupling

• Published in: IEEE transactions on electron devices Vol. 51; no. 2; pp. 240 - 245
• Main Authors: Pretet, J., Monfray, S., Cristoloveanu, S., Skotnicki, T.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.02.2004; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Charge; Charge carrier mobility; Depletion; Devices; Insulated gate FETs; Integrated circuit testing; Joining; Modulation; MOSFETs; Oxides; Silicon on insulator technology; Threshold voltage
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2003.822226

Silicon-on-nothing (SON) transistors with gate length varying from 0.25 /spl mu/m down to 80 nm exhibit excellent performance and scalability. The silicon-on-insulator (SOI)-like architecture with thin fully depleted Si film and ultrathin buried oxide results in attenuated short-channel effects (charge sharing, DIBL and fringing fields), high current, and electron mobility. A new model accounts for the intrinsic mechanisms of operation in SON MOSFETs: i) substrate depletion governed by source and drain via doping modulation, ii) relatively low coupling between the front- and backgates, iii) role of ultrathin buried oxide. The proposed model reproduces the variations of the threshold voltage and subthreshold swing and is useful for further device optimization.