An Analytical Model for Loc/ID Mappings Caches

• Published in: IEEE/ACM transactions on networking Vol. 24; no. 1; pp. 506 - 516
• Main Authors: Coras, Florin, Domingo-Pascual, Jordi, Lewis, Darrel, Cabellos-Aparicio, Albert
• Format: Journal Article Publication
• Language: English
• Published: New York IEEE 01.02.2016; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Analytical models; Cache memory; Cache modeling; Encaminadors (Xarxes d'ordinadors); Enginyeria de la telecomunicació; Equations; Gestió; IEEE transactions; Internet; Location/identity separation; Locator/ID Separation Protocol (LISP); Management; Mathematical model; Memory management; Memòria ràpida de treball (Informàtica); Network traffic locality; Routing; Routing (Computer network management); Telecommunication; Telecomunicació; Telemàtica i xarxes d'ordinadors; Traffic; Tràfic; Working-set model; Àrees temàtiques de la UPC
• ISSN: 1063-6692; 1558-2566
• DOI: 10.1109/TNET.2014.2373398

Concerns regarding the scalability of the interdomain routing have encouraged researchers to start elaborating a more robust Internet architecture. While consensus on the exact form of the solution is yet to be found, the need for a semantic decoupling of a node's location and identity is generally accepted as a promising way forward. However, this typically requires the use of caches that store temporal bindings between the two namespaces, to avoid hampering router packet forwarding speeds. In this article, we propose a methodology for an analytical analysis of cache performance that relies on the working-set theory. We first identify the conditions that network traffic must comply with for the theory to be applicable and then develop a model that predicts average cache miss rates relying on easily measurable traffic parameters. We validate the result by emulation, using real packet traces collected at the egress points of a campus and an academic network. To prove its versatility, we extend the model to consider cache polluting user traffic and observe that simple, low intensity attacks drastically reduce performance, whereby manufacturers should either overprovision router memory or implement more complex cache eviction policies.