FPGA-based amplitude and phase detection in DLLRF

• Published in: Chinese physics C Vol. 33; no. 7; pp. 594 - 598
• Main Author: 刘熔 王峥 潘卫民 王光伟 林海英 沙鹏 曾日华
• Format: Journal Article
• Language: English
• Published: IOP Publishing 01.07.2009; Institute of High Energy Physics, CAS, Beijing 100049, China; Graduate University of Chinese Academy of Sciences, Beijing 100049, China%School of Electronic and Information Engineering Tianjin University, Tianjin 300072, China%Institute of High Energy Physics, CAS, Beijing 100049, China
• Subjects: FPGA; 射频信号; 射频系统; 振幅和; 控制系统; 数模转换器; 现场可编程门阵列; 相位检测; jitter; FPGA; amplitude and phase detection; high-precision; ADC nonlinear; digital LLRF; CORDIC
• ISSN: 1674-1137; 0254-3052; 2058-6132
• DOI: 10.1088/1674-1137/33/7/017

The new generation particle accelerator requires a highly stable radio frequency（RF） system. The stability of the RF system is realized by the Low Level RF（LLRF） subsystem which controls the amplitude and phase of the RF signal. The detection of the RF signal＇s amplitude and phase is fundamental to LLRF controls. High-speed ADC（Analog to Digital Converter） ,DAC（Digital to Analog Converter） and FPGA（Field Programmable Gate Array） play very important roles in digital LLRF control systems. This paper describes the implementation of real-time amplitude and phase detection based of the FPGA with an analysis of the main factors that affect the detection accuracy such as jitter,algorithm＇s defects and non-linearity of devices,which is helpful for future work on high precision detection and control.