A Radix-10 Digit-Recurrence Division Unit: Algorithm and Architecture

• Published in: IEEE transactions on computers Vol. 56; no. 6; pp. 727 - 739
• Main Authors: Lang, T., Nannarelli, A.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.06.2007; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Algorithms; algorithms and architectures for floating-point arithmetic; Approximation; Decimal arithmetic; decimal division; Delay; digit-recurrence division; Digits; Dividers; Division; Dynamic range; Mathematical analysis; Studies
• ISSN: 0018-9340; 1557-9956
• DOI: 10.1109/TC.2007.1038

In this work, we present a radix-10 division unit that is based on the digit-recurrence algorithm. The previous decimal division designs do not include recent developments in the theory and practice of this type of algorithm, which were developed for radix-2 k dividers. In addition to the adaptation of these features, the radix-10 quotient digit is decomposed into a radix-2 digit and a radix-5 digit in such a way that only five and two times the divisor are required in the recurrence. Moreover, the most significant slice of the recurrence, which includes the selection function, is implemented in radix-2, avoiding the additional delay introduced by the radix-10 carry-save additions and allowing the balancing of the paths to reduce the cycle delay. The results of the implementation of the proposed radix-10 division unit show that its latency is close to that of radix-16 division units (comparable dynamic range of significant) and it has a shorter latency than a radix-10 unit based on the Newton-Raphson approximation