Neural Synaptic Weighting With a Pulse-Based Memristor Circuit

A pulse-based programmable memristor circuit for implementing synaptic weights for artificial neural networks is proposed. In the memristor weighting circuit, both positive and negative multiplications are performed via a charge-dependent Ohm's law (). The circuit is composed of five memristors...

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Bibliographic Details
Published inIEEE transactions on circuits and systems. I, Regular papers Vol. 59; no. 1; pp. 148 - 158
Main Authors Hyongsuk Kim, Sah, Maheshwar, Changju Yang, Roska, Tamás, Chua, Leon O.
Format Journal Article
LanguageEnglish
Published New York IEEE 01.01.2012
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Adjustability
Circuits
Computer simulation
Integrated circuit modeling
Joints
Mathematical model
memristor
Memristors
Noise
programmable synapse
pulse-based processing
Resistance
Switches
Switching
Synapses
synaptic weight
Terminals
Titanium dioxide
Transistors
Weighting
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Summary:A pulse-based programmable memristor circuit for implementing synaptic weights for artificial neural networks is proposed. In the memristor weighting circuit, both positive and negative multiplications are performed via a charge-dependent Ohm's law (). The circuit is composed of five memristors with bridge-like connections and operates like an artificial synapse with pulse-based processing and adjustability. The sign switching pulses, weight setting pulses and synaptic processing pulses are applied through a shared input terminal. Simulations are done with both linear memristor and window-based nonlinear memristor models.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
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ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2011.2161360