Contact resistance extraction in pentacene thin film transistors

• Published in: Solid-state electronics Vol. 47; no. 2; pp. 259 - 262
• Main Authors: Necliudov, Peter V, Shur, Michael S, Gundlach, David J, Jackson, Thomas N
• Format: Journal Article
• Language: English
• Published: Elsevier Ltd 01.02.2003
• ISSN: 0038-1101; 1879-2405
• DOI: 10.1016/S0038-1101(02)00204-6

We report on the contact resistances for pentacene thin film transistors with two different designs: top and bottom contact configurations (referred to as TC and BC TFTs, respectively) for two different contact metals (gold and palladium). The extraction was done based on the dependencies of the channel resistances on the gate length and gate voltage. The extracted gold TC TFT contact resistance depends on V GS, but shows no dependence on the drain bias. The TC TFT contact resistance is comparable to or exceeds the channel resistance for channels shorter than approximately 10 μm. The contact resistance of BC TFTs depends both on gate and drain bias. We propose a circuit simulating the BC TFT contact resistance and verify the circuit applicability by extracting and comparing the TFT channel resistances at different drain voltages. Our results reveal an important role played by contact resistances and provide an accurate model of the contact phenomena suitable for implementation in Spice or other circuit simulators.