Leakage Current Suppression on Metal-Induced Laterally Crystallized Polycrystalline Silicon Thin-Film Transistors by Asymmetrically Deposited Nickel
The electrical performance of low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) fabricated by metal-induced lateral crystallization (MILC) is greatly affected by metal catalyst contaminations, such as Ni and Ni silicide trapped in the channel, since they concentrate in fron...
Saved in:
Published in | Japanese Journal of Applied Physics Vol. 52; no. 10; pp. 10MA01 - 10MA01-5 |
---|---|
Main Authors | , , , , , |
Format | Journal Article |
Language | English |
Published |
The Japan Society of Applied Physics
01.10.2013
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | The electrical performance of low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) fabricated by metal-induced lateral crystallization (MILC) is greatly affected by metal catalyst contaminations, such as Ni and Ni silicide trapped in the channel, since they concentrate in front of laterally grown crystallites. In the present work, the effect of the MILC/MILC boundary (MMB) on MILC polycrystalline silicon (poly-Si) TFTs is investigated by the comparison of MILC poly-Si TFTs with MMB at the center of the channel, and equivalent TFTs with MMB at a position ejected from the channel. The MMB location was controlled by the Ni catalyst position. Both a low off-state leakage current and a free from short channel effect (kink effect) were observed in high electric-field conditions. Furthermore, the field-effect mobility and drain current noise were drastically improved by ejecting the MILC boundary in the source direction. |
---|---|
Bibliography: | (Color online) Schematic structures diagrams of (a) conventional MILC, (b) drain-MMB, and (c) source-MMB poly-Si TFTs. FESEM images of MIC, MILC, and MILC boundary regions. The samples were chemically treated by Secco etchant before analysis. (Color online) Typical $I_{\text{D}}$--$V_{\text{G}}$ transfer curves of conventional symmetrical MMB, drain MMB, and source MMB poly-Si TFTs measured at (a) $V_{\text{D}} = -5$ V and (b) $V_{\text{D}} = -10$ V. (Color online) Reverse gate bias dependence of leakage current as a function of drain voltage characteristics for (a) symmetrical, (b) drain-MMB, and (c) source MMB poly-Si TFTs. In each plots, the leakage drain current noise at low drain voltage is shown. (Color online) Comparison of $I_{\text{D}}$--$V_{\text{D}}$ output characteristics of (a) symmetrical, (b) drain-MMB, and (c) source-MMB poly-Si TFTs. ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23 |
ISSN: | 0021-4922 1347-4065 |
DOI: | 10.7567/JJAP.52.10MA01 |