A scalable high-frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design

Fully scalable, analytical HF noise parameter equations for bipolar transistors are presented and experimentally tested on high-speed Si and SiGe technologies. A technique for extracting the complete set of transistor noise parameters from Y parameter measurements only is developed and verified. Fin...

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Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 32; no. 9; pp. 1430 - 1439
Main Authors Voinigescu, S.P., Maliepaard, M.C., Showell, J.L., Babcock, G.E., Marchesan, D., Schroter, M., Schvan, P., Harame, D.L.
Format Journal Article
LanguageEnglish
Published IEEE 01.09.1997
Subjects
Background noise
Bipolar transistors
Circuit noise
Equations
Integrated circuit noise
Low-noise amplifiers
Noise figure
Noise measurement
Semiconductor device noise
Silicon germanium
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Summary:Fully scalable, analytical HF noise parameter equations for bipolar transistors are presented and experimentally tested on high-speed Si and SiGe technologies. A technique for extracting the complete set of transistor noise parameters from Y parameter measurements only is developed and verified. Finally, the noise equations are coupled with scalable variants of the HICUM and SPICE-Gummel-Poon models and are employed in the design of tuned low noise amplifiers (LNA's) in the 1.9-, 2.4-,and 5.8-GHz bands.
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ISSN:0018-9200
1558-173X
DOI:10.1109/4.628757