Design and measurement of fully digital ternary content addressable memory using ratioless static random access memory cells and hierarchical-AND matching comparator

• Published in: Japanese Journal of Applied Physics Vol. 57; no. 4S; pp. 4 - 8
• Main Authors: Nishikata, Daisuke, Mohd Ali, Mohammad Alimudin Bin, Hosoda, Kento, Matsumoto, Hiroshi, Nakamura, Kazuyuki
• Format: Journal Article
• Language: English
• Published: Tokyo The Japan Society of Applied Physics 01.04.2018; Japanese Journal of Applied Physics
• Subjects: Associative memory; CMOS; Comparators; Computer memory; Digital technology; Electric potential; Matching; Random access memory; Resistors; Static random access memory
• ISSN: 0021-4922; 1347-4065
• DOI: 10.7567/JJAP.57.04FF11

A 36-bit × 32-entry fully digital ternary content addressable memory (TCAM) using the ratioless static random access memory (RL-SRAM) technology and fully complementary hierarchical-AND matching comparators (HAMCs) was developed. Since its fully complementary and digital operation enables the effect of device variabilities to be avoided, it can operate with a quite low supply voltage. A test chip incorporating a conventional TCAM and a proposed 24-transistor ratioless TCAM (RL-TCAM) cells and HAMCs was developed using a 0.18 µm CMOS process. The minimum operating voltage of 0.25 V of the developed RL-TCAM, which is less than half of that of the conventional TCAM, was measured via the conventional CMOS push-pull output buffers with the level-shifting and flipping technique using optimized pull-up voltage and resistors.