Efficiency enhanced CMOS digitally controlled dynamic bias switching power amplifier for LTE

• Published in: Microwave and optical technology letters Vol. 57; no. 10; pp. 2315 - 2321
• Main Authors: Kim, Hyungchul, Bae, Jongsuk, Ham, Junghyun, Gu, Jehyeon, Seo, Mincheol, Hwang, Keum Cheol, Lee, Kang-Yoon, Park, Cheon-Seok, Yang, Youngoo
• Format: Journal Article
• Language: English
• Published: New York Blackwell Publishing Ltd 01.10.2015; Wiley Subscription Services, Inc
• Subjects: Bias; CMOS; DC-DC converter; dynamic bias swtiching; Dynamics; Electric potential; power amplifier integrated circuit; Power amplifiers; power supply modulator; Switching; Switching circuits; Voltage
• ISSN: 0895-2477; 1098-2760
• DOI: 10.1002/mop.29330

ABSTRACT This article presents an efficiency enhanced CMOS power amplifier using a digitally controlled dynamic bias switching method. It is composed of a dynamic bias switching circuit and a power amplifier circuit. The control signal for bias switching operation is generated by the digital signal processing unit according to the amplitude of the envelope signal. Then, the dynamic bias switching circuit offers two different supply voltages to the drain of the power amplifier. The low supply voltage is generated by a DC–DC converter within the dynamic bias switching circuit, while the high voltage can be directly supplied by the battery. The threshold voltage for the envelope signal and the low supply voltage level were analytically optimized for maximum efficiency enhancement using the envelope statistics of the LTE signal. The gain difference between low and high bias voltage conditions was compensated for better linearity of the power amplifier. The proposed dynamic bias and power amplifier IC's were designed and fabricated using 0.18 μm CMOS process. The fabricated CMOS power amplifier IC using the dynamic bias switching method was evaluated using a 64 QAM LTE up‐link signal which has a center frequency of 1.75 GHz, a signal bandwidth of 5 MHz, and a peak‐to‐average power ratio of 7.76 dB. It exhibited a power‐added efficiency of 39.3% and an error vector magnitude of 4.6% at an average output power of 22 dBm, while the stand‐alone CMOS power amplifier has an efficiency of 34.5%. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:2315–2321, 2015