Electrical characterization of Random Telegraph Noise in Fully-Depleted Silicon-On-Insulator MOSFETs under extended temperature range and back-bias operation

Random Telegraph Noise (RTN) has been studied in Ultra-Thin Fully-Depleted Silicon-On-Insulator transistors. A modified Time Lag Plot algorithm has been used to identify devices with a single active trap. The physical characteristics of the trap have been extracted based on Shockley–Read–Hall models...

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Bibliographic Details
Published inSolid-state electronics Vol. 117; pp. 60 - 65
Main Authors Marquez, Carlos, Rodriguez, Noel, Gamiz, Francisco, Ruiz, Rafael, Ohata, Akiko
Format Journal Article
LanguageEnglish
Published Elsevier Ltd 01.03.2016
Subjects
Back-bias
Buried oxide
MOSFET
Random Telegraph Noise
Reliability
Silicon-On-Insulator
MOSFET
Silicon-On-Insulator
Back-bias
Reliability
Random Telegraph Noise
Buried oxide
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Summary:Random Telegraph Noise (RTN) has been studied in Ultra-Thin Fully-Depleted Silicon-On-Insulator transistors. A modified Time Lag Plot algorithm has been used to identify devices with a single active trap. The physical characteristics of the trap have been extracted based on Shockley–Read–Hall models, revealing the possible trends of capture and emission times of the trap according to its physical and energetic position. The effect of the temperature on the characteristic times has been studied in the range from 248 to 323K validating the results obtained at room temperature. Finally, the impact of back-bias on the RTN fluctuation has been modelled through the Lim–Fossum interface coupling relationships, allowing to predict accurately the experimental results.
ISSN:0038-1101
1879-2405
DOI:10.1016/j.sse.2015.11.022