RC delay metrics for performance optimization
For performance optimization tasks such as floorplanning, placement, buffer insertion, wire sizing, and global routing, the Elmore resistance-capacitance (RC) delay metric remains popular due to its simple closed form expression, fast computation speed, and fidelity with respect to simulation. More...
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Published in | IEEE transactions on computer-aided design of integrated circuits and systems Vol. 20; no. 5; pp. 571 - 582 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.05.2001
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | For performance optimization tasks such as floorplanning, placement, buffer insertion, wire sizing, and global routing, the Elmore resistance-capacitance (RC) delay metric remains popular due to its simple closed form expression, fast computation speed, and fidelity with respect to simulation. More accurate delay computation methods are typically central processing unit intensive and/or difficult to implement. To bridge this gap between accuracy and efficiency/simplicity, we propose two new RC delay metrics called delay via two moments (D2M) and effective capacitance metric (ECM), which are virtually as simple and fast as the Elmore metric, but more accurate. D2M uses two moments of the impulse response in a simple formula that has high accuracy at the far end of RC lines. ECM captures resistive shielding effects by modeling the downstream capacitance by an "effective capacitance." In contrast, the Elmore metric models this as a lumped capacitance, thereby ignoring resistive shielding. Although not as accurate as D2M, ECM yields consistent performance and may be well-suited to optimization due to its Elmore-like recursive construction. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0278-0070 1937-4151 |
DOI: | 10.1109/43.920682 |