Linearity improvement of RF mixer using double-linearization for 5 GHz applications

• Published in: International journal of electronics and communications Vol. 110; p. 152856
• Main Authors: Gladson, S. Chrisben, Vijayalakshmi, S., Lakshmi, M. Sowmya, Bhaskar, M.
• Format: Journal Article
• Language: English
• Published: Elsevier GmbH 01.10.2019
• Subjects: IIP3; IMR2; Linearization; Mixer; SFDR; IIP3; 5G; RF; IMR2; Mixer; SFDR; Linearization; DC
• ISSN: 1434-8411; 1618-0399
• DOI: 10.1016/j.aeue.2019.152856

With 5G expected to roll out in 2020, the 5 GHz band will be sort after for sub-6 GHz 5G implementation. The feasibility of the wireless systems at 5 GHz will be primarily determined by the linearity of the RF down-converters in the receiver system. With growing battery-powered, portable, and wearable wireless devices, the task of achieving excellent linearity with low power consumption in RF down-converters is difficult. This work tries to overcome the difficulty by proposing a double-linearization (DL) based RF mixer. The proposed mixer circuit is designed using UMC 180 nm CMOS process libraries, and the post-layout simulations are carried out using Cadence SpectreRF in the presence of single-sideband phase noise. For a fundamental tone at 5 GHz and an interferer at 5.01 GHz, the proposed mixer using double-linearization achieves an input-referred third-order intercept point (IIP3) of 11.04 dBm, which is a 15 dB improvement over the IIP3 obtained before employing the proposed scheme. The proposed RF mixer circuit provides a conversion gain of 15.33 dB and an integrated double-sideband noise figure (DSB-NF) of 16.39 dB while consuming a low power of 1.5mW from a 1 V supply. The circuit also boasts an SFDR of 81.36 dB and IMR2 of 192.1 dB. The IIP3/mW ratio of the DL based mixer is 6.5 dB more than the recently proposed mixer topology. The layout of the proposed mixer consumes 0.57mm2.