A 2-V CMOS 455-kHz FM/FSK demodulator using feedforward offset cancellation limiting amplifier

This paper presents a low-voltage low-power IF 455-kHz signal processor that contains a three-stage limiting amplifier and an FM/FSK demodulator. The limiting amplifier uses an on-chip feedforward offset cancellation circuit. The FM/FSK demodulator employs a quadrature detector that is composed of a...

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Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 36; no. 1; pp. 135 - 138
Main Authors Huang, Po-Chiun, Chen, Yi-Huei, Wang, Chorng-Kuang
Format Journal Article
LanguageEnglish
Published New York IEEE 01.01.2001
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Amplifiers
Automatic control
CMOS
CMOS technology
Communication system control
Constraining
Demodulation
Demodulators
Detectors
Feedforward
Frequency shift keying
Integrated circuit technology
Intermediate frequency
Limiting
Microprocessors
Offsets
Phase detection
Signal processing
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Summary:This paper presents a low-voltage low-power IF 455-kHz signal processor that contains a three-stage limiting amplifier and an FM/FSK demodulator. The limiting amplifier uses an on-chip feedforward offset cancellation circuit. The FM/FSK demodulator employs a quadrature detector that is composed of an on-chip phase detector and an external tank phase shifter. The demodulation constant is 20 mV/kHz with masimum /spl plusmn/10-kHz frequency deviation. The IF signal processor that consumes 2.3 mW from a single 2-V power supply demonstrates a high sensitivity of -72 dBm. It occupies an active area of 0.2 mm/sup 2/ using 0.6-/spl mu/m digital CMOS technology.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9200
1558-173X
DOI:10.1109/4.896238