Capacitor model for a floating gate EEPROM cell
This paper presents a transient simulation model of a floating gate EEPROM cell based on the capacitor equivalent circuit of the device. The model is compared with a capacitor equivalent circuit model previously presented in the literature. The model is used to simulate the write and erase cycle tun...
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Published in | International journal of electronics Vol. 84; no. 6; pp. 561 - 581 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
London
Taylor & Francis Group
01.06.1998
Taylor & Francis |
Subjects | |
Online Access | Get full text |
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