Implicit DC-DC downconversion through charge-recycling
This paper describes an energy-efficient means to achieve on-chip dc-dc conversion for digital CMOS circuits. The approach uses balanced voltage islands running at fractions of the off-chip supply voltage. Charge "discarded" by one domain is "recycled" to supply energy for anothe...
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Published in | IEEE journal of solid-state circuits Vol. 40; no. 4; pp. 846 - 852 |
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Main Authors | , , |
Format | Journal Article Conference Proceeding |
Language | English |
Published |
New York, NY
IEEE
01.04.2005
Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | This paper describes an energy-efficient means to achieve on-chip dc-dc conversion for digital CMOS circuits. The approach uses balanced voltage islands running at fractions of the off-chip supply voltage. Charge "discarded" by one domain is "recycled" to supply energy for another. When the domains are ideally balanced, all the energy dissipated by electrons in "dropping" to lower potentials is used for active computation. We describe the design and measurement of a prototype system in a 0.18 /spl mu/m CMOS process that provides active on-chip voltage regulation and controlled dc-dc conversion with this technique. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 ObjectType-Article-1 ObjectType-Feature-2 |
ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/JSSC.2004.842861 |