A Broadband Multistage LNA With Bandwidth and Linearity Enhancement
Design techniques to enhance bandwidth and linearity of broadband multistage low-noise amplifiers (LNAs) are presented. A feedback amplifier circuit is proposed to compensate for transistor gain roll-off with frequency in other amplifier stages and extend overall bandwidth. Moreover, a transistor wi...
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Published in | IEEE microwave and wireless components letters Vol. 26; no. 10; pp. 834 - 836 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
IEEE
01.10.2016
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Subjects | |
Online Access | Get full text |
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Summary: | Design techniques to enhance bandwidth and linearity of broadband multistage low-noise amplifiers (LNAs) are presented. A feedback amplifier circuit is proposed to compensate for transistor gain roll-off with frequency in other amplifier stages and extend overall bandwidth. Moreover, a transistor width tapering in a multistage LNA is applied to improve linearity. These techniques are adopted in a three-stage monolithic microwave integrated circuit (MMIC) LNA implemented in a 0.1-μm GaAs pHEMT process. The LNA features 18-43 GHz bandwidth, 21.6 dB average gain, and 1.8-2.7 noise figure (NF). It exhibits output 1-dB compression point of 11.5 dBm at 30 GHz and consumes 70 mA bias current from a 2-V supply. |
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ISSN: | 1531-1309 1558-1764 |
DOI: | 10.1109/LMWC.2016.2605446 |