Channel Coding for Nonvolatile Memory Technologies: Theoretical Advances and Practical Considerations

• Published in: Proceedings of the IEEE Vol. 105; no. 9; pp. 1705 - 1724
• Main Authors: Dolecek, Lara, Cassuto, Yuval
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.09.2017; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Algebraic codes; BCH codes; Channel coding; Coding; Computer architecture; Data storage; Drives; error-correction code (ECC); Flash memories; graph codes; LDPC codes; Mathematical analysis; Matrix methods; Memory devices; Microprocessors; Nonvolatile memory; Phase transitions; Reliability; rewrite codes; Solid-state circuits; WOM codes
• ISSN: 0018-9219; 1558-2256
• DOI: 10.1109/JPROC.2017.2694613

Every bit of information in a storage or memory device is bound by a multitude of performance specifications, and is subject to a variety of reliability impediments. At the other end, the physical processes tamed to remember our bits offer a constant source of risk to their reliability. These include a variety of noise sources, access restrictions, intercell interferences, cell variabilities, and many more issues. Tying together this vector of performance figures with that vector of reliability issues is a rich matrix of emerging coding tools and techniques. Channel coding schemes ensure target reliability and performance and have been at the core of memory systems since their nascent age. In this survey, we first overview the fundamentals of channel coding and summarize well-known codes that have been used in nonvolatile memories (NVMs). Next, we demonstrate why the conventional coding approaches ubiquitously based on symmetric channel models and optimization for the Hamming metric fail to address the needs of modern memories. We then discuss several recently proposed innovative coding schemes. Behind each coding scheme lies an interesting theoretical framework, building on deep ideas from mathematics and the information sciences. We also survey some of the most fascinating bridges between deep theory and storage performance. While the focus of this survey is primarily on the pervasive multilevel NAND Flash, we envision that other benefiting memory technologies will include phase change memory, resistive memories, and others.