An Adaptive Global and Local Tone Mapping Algorithm Implemented on FPGA
We present a fast global and locally adaptive tone mapping algorithm and its field-programmable gate array (FPGA) implementation. The specially designed tone mapping function, which is based on local histogram equalization, controls global, and local characteristics individually. In contrast to othe...
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Published in | IEEE transactions on circuits and systems for video technology Vol. 30; no. 9; pp. 3015 - 3028 |
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Main Authors | , , , , , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.09.2020
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | We present a fast global and locally adaptive tone mapping algorithm and its field-programmable gate array (FPGA) implementation. The specially designed tone mapping function, which is based on local histogram equalization, controls global, and local characteristics individually. In contrast to other tonemap operators, our algorithm manages light/dark halos separately and by using local tonemap function alone, it can effectively suppress noise. We validated the effectiveness of our algorithms using subjective and objective assessment. Using an average of the bins, we achieve fast smoothed local histogram estimation with fewer bins while maintaining high accuracy. Our new implementation method requires minimal data access and reduced memory as it operates with a downscaled frame size of <inline-formula> <tex-math notation="LaTeX">240\times135 </tex-math></inline-formula> pixels. Relative local area size is <inline-formula> <tex-math notation="LaTeX">248\times248 </tex-math></inline-formula> @Full-HD resolution (<inline-formula> <tex-math notation="LaTeX">1920\times1080 </tex-math></inline-formula>). For low-latency pixel output, the system performs the tone mapping using pixel information from the previous frame. When we implemented the system on FPGA (TB-7K-325TIMG and Xilinx Kintex-7), we achieved lightweight hardware as the total usage rate is about 25% of the available FPGA resource. Using an online 1080p video we demonstrate, a real-time video processing using our hardware tone mapping system. |
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ISSN: | 1051-8215 1558-2205 |
DOI: | 10.1109/TCSVT.2019.2931510 |