Investigation of trap induced power drift on 0.15 μm GaN technology after aging tests

• Published in: Microelectronics and reliability Vol. 100-101; p. 113358
• Main Authors: Magnier, F., Lambert, B., Chang, C., Curutchet, A., Labat, N., Malbert, N.
• Format: Journal Article
• Language: English
• Published: Elsevier Ltd 01.09.2019
• ISSN: 0026-2714; 1872-941X
• DOI: 10.1016/j.microrel.2019.06.050

This paper deals with a power drift occurring during the first hours of aging tests on a 0.15 μm GaN-based technology. Its purpose is to characterize the kinetic and the electrical features of this parasitic effect. Output power drift has been monitored by substituting interim RF power measurements by pulsed-IV measurements during high temperature reverse bias tests. Moreover, the kinetic of the output power drift has been assessed by reducing the time between interim measurements. Additional aging tests were performed at different temperatures to found out if the degradation is temperature activated. An interpretation is proposed about an increase of trap density responsible for drain lag effect after aging test at temperature higher than room temperature. •Investigation of initial output power stabilization on GaN technology•Aging test power drift is followed by pulsed-IV based method.•Output power drift occurs during the first 30 min of aging tests.•Drain current drop occurs within the transition between ohmic and saturated regions.•This phenomenon is probably induced by trapping mechanisms.