Analysis and Design of High-Harmonic-Rejection Multi-Ratio mm-Wave Frequency Multipliers

• Published in: IEEE journal of solid-state circuits Vol. 57; no. 1; pp. 260 - 277
• Main Authors: Zhang, Jingzhi, Peng, Yu, Kang, Kai
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.01.2022; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Cutting; Frequency conversion; Frequency locking; Frequency multiplier; Frequency multipliers; Harmonic analysis; harmonic generation; Harmonic generations; harmonic rejection; injection locking; Injection-locked oscillators; Millimeter waves; Modulation; multi-ratio (MR); Multiplication; Phase noise; Power consumption; Power demand; Power system harmonics; Rejection; Resonators; Signal quality; System-on-chip
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2021.3101665

Frequency multipliers are key components for high-quality millimeter-wave signal generations. However, the harmonic spurs generated by the frequency multipliers significantly affect the system performance. As a result, a high harmonic rejection is required in the frequency multiplier design. In this article, we present a multi-ratio (MR) frequency multiplier that exhibits <inline-formula> <tex-math notation="LaTeX">\times 5 </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">\times 7 </tex-math></inline-formula> switchable multiplication ratios. Three processes of frequency multiplication, harmonic generation, harmonic amplification, and harmonic selection, are analyzed, and the corresponding techniques for harmonic suppression are introduced. The harmonic spurs can be suppressed by these three techniques: high-efficiency harmonic generation, injection locking, and tunable fourth-order resonator. First, the high-efficiency harmonic generation is realized by chopping the drain current, which enables a harmonic-rich spectrum to be generated, and the shape of the spectrum can be controlled by the biasing voltage. The second technique, injection locking, can suppress the harmonic spurs by its frequency-modulation (FM) and amplitude-modulation (AM) nature. The third technique, the tunable fourth-order resonator, can select the desired harmonic and suppress others. An MR injection-locked frequency multiplier was implemented in a 65-nm CMOS process as the proof-of-concept design. The multiplier operates from 22.4 to 40.6 GHz, and the measured harmonic rejection ratio is 57.7 dBc at 28 GHz and 51.7 dBc at 39 GHz with 10.0-mW power consumption.