Suppression of Read Disturb Fail Caused by Boosting Hot Carrier Injection Effect for 3-D Stack NAND Flash Memories

• Published in: IEEE electron device letters Vol. 35; no. 1; pp. 42 - 44
• Main Authors: CHOE, Byeong-In, LEE, Jung-Kyu, PARK, Byung-Gook, LEE, Jong-Ho
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.01.2014; Institute of Electrical and Electronics Engineers
• Subjects: 3-D stack NAND flash; Applied sciences; Ash; Boosting; Circuit properties; Computer architecture; Design. Technologies. Operation analysis. Testing; Digital circuits; Electric potential; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Hot carrier injection; Integrated circuits; Integrated circuits by function (including memories and processors); Microprocessors; NAND flash; read disturb; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Stress; Logic circuit; NAND circuit; Non volatile memory; Stacking; Flash memory; NAND flash; Integrated circuit; read disturb; Hot carrier; 3-D stack NAND flash; Charge carrier injection; hot carrier injection
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2013.2288991

A new bias pulse method was proposed to suppress read disturbance in unselected strings of 3-D stack NAND flash memories. Using the proposed read method, we could suppress effectively a large cell Vth shift generated by boosting hot carrier injection. As a result, the cell Vth shift in unselected string is quite similar to normal read disturbance in select string. The proposed read method was verified by both measurement and simulation.