A novel vertical channel self-aligned split-gate flash memory

• Published in: Solid-state electronics Vol. 53; no. 2; pp. 124 - 126
• Main Authors: Wu, Dake, Zhou, Falong, Huang, Ru, Li, Yan, Cai, Yimao, Guo, Ao, Zhang, Xing, Wang, Yangyuan
• Format: Journal Article
• Language: English
• Published: Kidlington Elsevier Ltd 01.02.2009; Elsevier
• Subjects: Applied sciences; Channels; Cycles; Design. Technologies. Operation analysis. Testing; Electronics; Endurance; Exact sciences and technology; Feasibility; Flash memory; Flash memory (computers); Floating-gate; Gates; High-density; Integrated circuits; Integrated circuits by function (including memories and processors); Low-power; Programming; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Split-gate; Vertical channel; Floating-gate; High-density; Split-gate; Vertical channel; Flash memory; Low-power; Scalability; High density; Floating gate technology; Self aligned technology; Split gate technology; Boating-gate; Integrated circuit; Low-power electronics
• ISSN: 0038-1101; 1879-2405
• DOI: 10.1016/j.sse.2008.11.014

A novel vertical channel self-aligned split-gate floating-gate flash memory (VSAS_FG) was proposed and experimentally demonstrated for the first time. The floating-gate of VSAS_FG can be self-aligned realized without additional mask. Moreover, the VSAS_FG has higher scalability since the cell area of vertical channel device is independent on gate length. With enhanced electrical fields for programming and erasing, the fabricated VSAS_FG can achieve ∼10 μs programming time and ∼10 ms erasing time. The cycling endurance and the bake retention were also investigated. The experimental results demonstrate the feasibility of the VSAS_FG concept as a promising candidate for low-power, high-density flash memory application.