A second‐generation voltage conveyor (VCII)–based simulated grounded inductor

Summary In this paper, an implementation of a simulated grounded inductor (SGI) based on a recently developed active building block called second‐generation voltage conveyor (VCII) is proposed. The proposed SGI employs two VCIIs, two resistors, and one grounded capacitor, which is preferred when int...

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Published inInternational journal of circuit theory and applications Vol. 48; no. 7; pp. 1180 - 1193
Main Authors Safari, Leila, Yuce, Erkan, Minaei, Shahram, Ferri, Giuseppe, Stornelli, Vincenzo
Format Journal Article
LanguageEnglish
Published Bognor Regis Wiley Subscription Services, Inc 01.07.2020
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ISSN0098-9886
1097-007X
DOI10.1002/cta.2770

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Summary:Summary In this paper, an implementation of a simulated grounded inductor (SGI) based on a recently developed active building block called second‐generation voltage conveyor (VCII) is proposed. The proposed SGI employs two VCIIs, two resistors, and one grounded capacitor, which is preferred when integration is involved. More importantly, unlike most of the other previously reported SGIs, this one is free from any restrictive matching conditions. A complete analysis of nonidealities along with sensitivity treatment by considering parasitic impedances and nonideal gains of the VCII are performed. A simple VCII circuit is designed to be used in the implementation of the proposed SGI. To support the presented theory, Pspice simulation results using 0.18‐μm CMOS technology parameters and supply voltage of ±0.9 V are provided. On the basis of the achieved results, the proposed SGI operates in a good agreement with an ideal inductor. The power consumption is only 0.65 mW, and the parasitic series impedance is approximately 191.9 Ω. The applicability of the proposed SGI is tested by using it in a standard second‐order high‐pass RLC filter. An implementation of a simulated grounded simulator based on a recently developed active building block called second generation voltage conveyor (VCII) is proposed. The proposed circuit employs two VCIIs, two resistors, and one grounded capacitor, which is preferred from integration point of view. More importantly, unlike most of the other previously reported works, it is free from any restrictive matching conditions.
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ISSN:0098-9886
1097-007X
DOI:10.1002/cta.2770