Statistical Pattern Recognition and Built-in Reliability Test for Feature Extraction and Health Monitoring of Electronics Under Shock Loads

• Published in: IEEE transactions on components and packaging technologies Vol. 32; no. 3; pp. 600 - 616
• Main Authors: Lall, P., Choudhary, P., Gupte, S., Hofmeister, J.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.09.2009; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Assembly; Boundary conditions; Built-in self-test; Condition monitoring; Confidence intervals; Damage; Electric shock; Electronic equipment; Electronic equipment testing; Failure; Failure analysis; Feature extraction; Finite element analysis; finite element methods; Frequency; health monitoring; Indicators; Lead; Mathematical models; Pattern recognition; Progressions; reliability modeling; reliability testing; shock; Strain; Studies; vibration
• ISSN: 1521-3331; 1557-9972
• DOI: 10.1109/TCAPT.2009.2026426

The built-in stress test (BIST) is extensively used for diagnostics or identification of failure. The current version of BIST approach is focused on reactive failure detection and provides limited insight into reliability and residual life. A new approach has been developed to monitor product-level damage during shock and vibration. The approach focuses on the pre- failure space and methodologies for quantification of failure in electronic equipment subject to shock and vibration loads using the dynamic response of the electronic equipment. The presented methodologies are applicable at the system level for the identification of impending failures to trigger repair or replacement significantly prior to failure. Leading indicators of shock-damage have been developed to correlate with the damage initiation and progression in shock and drop of electronic assemblies. Three methodologies have been investigated for feature extraction and health monitoring including development of a new solder- interconnect built-in reliability test, FFT-based statistical-pattern recognition, and time-frequency moments based statistical pattern recognition. The solder-joint built-in reliability test has been developed for detecting high resistance and intermittent faults in operational, fully programmed field programmable gate arrays. Frequency band energy is computed using FFT and utilized as the classification feature to check for damage and failure in the assembly. In addition, the time-frequency analysis has been used to study the energy densities of the signal in both time and frequency domains, and provide information about the time evolution of frequency content of transient- strain signal. Closed-form models and explicit finite-element models have been developed for the eigen frequencies, mode shapes, and transient response of electronic assemblies with various boundary conditions and component placement configurations. Model predictions have been validated with experimental data from modal analysis. Pristine configurations have been perturbed to quantify the degradation in confidence values with progression of damage. Sensitivity of leading indicators of shock damage to subtle changes in boundary conditions,effective flexural rigidity, and transient strain response has been quantified.