Impact ionization in 0.1 μm metal-oxide-semiconductor field-effect transistors

The impact ionization rate in a silicon metal-oxide-semiconductor field-effect transistor (MOSFET) is universally plotted on a simple straight line when l n ( I sub / I d ) is plotted versus 1/( V ds - V dsat ). V dsat is the drain saturation voltage. However, we found a deviation from this universa...

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Bibliographic Details
Published inJapanese Journal of Applied Physics Vol. 34; no. 3B; pp. L345 - L348
Main Authors KURATA, H, NARA, Y, SUGII, T
Format Journal Article
LanguageEnglish
Published Tokyo Japanese journal of applied physics 01.03.1995
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Summary:The impact ionization rate in a silicon metal-oxide-semiconductor field-effect transistor (MOSFET) is universally plotted on a simple straight line when l n ( I sub / I d ) is plotted versus 1/( V ds - V dsat ). V dsat is the drain saturation voltage. However, we found a deviation from this universal relationship for different gate voltages applied to the MOSFETs fabricated by 0.15 µ m technology. We show that the deviation is due to the gate-voltage dependence of the saturation electric field E sat , which results from the degradation of the effective surface mobility µ eff . The new method for finding a universal relationship is proposed.
ISSN:0021-4922
1347-4065
DOI:10.1143/jjap.34.l345