Response Surface Based Optimization Approach for Thermal Placement Design of Chips in Multiple-Chip Modules

• Published in: IEEE transactions on components and packaging technologies Vol. 32; no. 3; pp. 531 - 541
• Main Authors: Chen, Wen-Hwa, Cheng, Hsien-Chie, Chung, I-Chun
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.09.2009; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Chips (electronics); Context modeling; Design engineering; Design optimization; Electronics packaging; Finite element methods; Finite element modeling; Mathematical model; Mathematical models; Methodology; multichip modules; nonlinear superposition technique; optimal chip placement design; Optimization; Optimization methods; Placement; Plastics; Position (location); Power system modeling; response surface (RS) methodology; Response surface methodology; Response surfaces; Studies; Temperature; thermal management
• ISSN: 1521-3331; 1557-9972
• DOI: 10.1109/TCAPT.2009.2022272

This paper attempts to perform thermal enhancement of planar multiple-chip modules (MCMs) containing a number of chips of equal and/or unequal power through optimal chip placement design. To achieve the goal, an effective design approach is presented for the thermal design optimization problems in the context of models of placement of chips in MCMs. The approach combines the use of the currently proposed response surface (RS) based methodology, which is an optimization algorithm and a finite element modeling technique. The proposed RS-based methodology is used for creating a macro mathematical expression of the design objective of the thermal optimization problem, i.e., the total chip junction temperature of the system, associated with the design parameters, including the chip location and power. The validity of the mathematical expressions constructed is verified through two approaches. Furthermore, to make the constructed mathematical expression more compact while maintaining the associated solution accuracy, the backward variable elimination technique is employed. The effectiveness of the proposed design optimization methodology is demonstrated through several design case studies involving planar plastic ball grid array type MCMs. It is found that the proposed RS-based methodology could accurately define the macro mathematical model of the total system chip junction temperature in terms of the chip location and power. In addition, results show that the current optimal chip placement design can provide a minimal system temperature.