Investigation of the Impact of External Stress on Memory Characteristics by Modifying the Backside of Substrate

• Published in: IEEE transactions on electron devices Vol. 66; no. 4; pp. 1741 - 1746
• Main Authors: Oh, Young-Taek, Sim, Jae-Min, Toan, Nguyen Van, Kino, Hisashi, Ono, Takahito, Tanaka, Tetsu, Song, Yun-Heub
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.04.2019; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Curvature; Curvature method; Degradation; external stress; Force; interface trap densities; Interfacial properties; Leakage current; mechanical stress; Memory devices; metal–oxide–nitride–oxide–semiconductor (MONOS) structure; MONOS devices; Residual stress; Residual stresses; Silicon; Substrates; Tungsten
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2019.2900155

The effects of the external stress on memory device characteristics are numerically discussed, and experimental observations are made, based on the wafer curvature method for extraction of stress. An analysis of the interface state is then performed. The external force applied to the device was controlled by depositing a metal film on the wafer backside; then, the residual stress induced on the substrate was extracted. We observed that the dangling bond generated by the residual stress increases the trap site and deteriorates the interface properties. A resulting degradation of cell characteristics occurred, including an increase in the leakage current and degradation of the memory window, featuring a reduction in the oxide/nitride/oxide trap density, which worsens as the magnitude of stress increases. From these results, we concluded that minimizing the stress is essential for retaining the cell characteristics. Especially, our results are expected to be of great help in determining the effect of external force on the memory characteristics during the back-end-of-line processing.