Mechanism of negative-bias-temperature instability

• Published in: Journal of applied physics Vol. 69; no. 3; pp. 1712 - 1720
• Main Authors: BLAT, C. E, NICOLLIAN, E. H, POINDEXTER, E. H
• Format: Journal Article
• Language: English
• Published: Woodbury, NY American Institute of Physics 01.02.1991
• Subjects: Applied sciences; Electronics; Exact sciences and technology; Interfaces; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Charge density; Hole; Semiconductor materials; Integrated circuit; Metal Oxides; Electrochemical reaction; Current
• ISSN: 0021-8979; 1089-7550
• DOI: 10.1063/1.347217

Although negative-bias-temperature instability in metal-oxide-semiconductor integrated circuits has been minimized empirically, the exact mechanism is unknown. We argue in this paper that the mechanism of negative-bias-temperature instability can be modeled by a first-order electrochemical reaction between hydrogenated trivalent silicon, a neutral water-related species located in the oxide near the Si-SiO2 interface, and holes at the silicon surface to form neutral trivalent silicon and a positively charged water-related species. To show that such a reaction describes the phenomenon, we show that (1) water must be present in the oxide near the Si-SiO2 interface, (2) induced interface and oxide-fixed charge densities are equal, (3) the saturation interface-trap and oxide-fixed charge densities depend on the initial hole concentration at the silicon surface or aging field, (4) the buildup of these charge densities follows first-order reaction kinetics, and (5) time constants for this charge buildup are independent of aging field. The measurements which are done to demonstrate these features combine room-temperature charge measurement using the Q-C method with current measurements during accelerated aging.