SPIDER -- A CAD System for Modeling VLSI Metallization Patterns

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 6; no. 6; pp. 1023 - 1031
• Main Authors: Hall, J.E., Hocevar, D.E., Ping Yang, McGraw, M.J.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.11.1987; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Circuit analysis; Conductors; Current density; Design automation; Electromigration; Electronics; Exact sciences and technology; Finite element methods; Instruments; Integrated circuits; Metallization; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Very large scale integration; Voltage; Waveform; VLSI circuit; Voltage fall; Metallizing; Unsteady state; Algorithm; Failures; Modeling; Optimization; Computer program; Integrated circuit; Electrodiffusion; Current density; Computer aided design
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.1987.1270343

A system of CAD programs, called SPIDER, for ensuring adequate current-carrying capacity in VLSI circuits has been developed. The approach is hierarchical, and it automates and simplifies many of the tasks previously performed by the circuit designer. The system converts transient current waveforms into dc electromigration equivalent values, and includes an algorithm for determining the line width adjustments necessary for meeting specified median-time-to-failure (MTF) requirements. SPIDER also computes voltage drops with respect to a reference node and calls upon an optimization algorithm for correcting violations of a voltage drop specification.